M.2 Rev 5.0 does not change the physical dimensions or keys. The following remain identical:
The working group explicitly verified that existing M.2 mechanical designs could pass PCIe 5.0 compliance with improved layout practices – no retooling of connector housings was mandated.
Not every M.2 connector rated for Gen4 will work at Gen5. The spec refers to a new connector qualification test suite: pci express m.2 specification revision 5.0 version 1.0 pdf
This is the most heavily revised section. For the first time, the M.2 spec directly references PCIe Base Specification Revision 5.0 for transmitter and receiver equalization. Specifically:
To legally label an M.2 product as "PCIe 5.0 Certified," you must pass: The working group explicitly verified that existing M
If you take away only five facts regarding the pci express m.2 specification revision 5.0 version 1.0 pdf, make it these:
| Aspect | Detail | |--------|--------| | Data Rate | 32 GT/s per lane; x4 = ~15.75 GB/s raw bandwidth | | Keying | Same M-key and B+M-key physical design, but tighter electrical tolerances | | Power | Up to 14W sustained; L1.2 substate < 5 mW | | Backward Compatible | Yes, to PCIe 4.0 and 3.0 (electrically and via link negotiation) | | Access | PCI-SIG members only; not a public PDF | The PDF annex includes link to a ZIP archive with:
The PDF annex includes link to a ZIP archive with: